Fix Bug #11 (platform SPI transmit-only), FPGA B2 (chirp BRAM migration), FPGA B3 (DSP48 pipelining)
Bug #11: platform_noos_stm32.c used HAL_SPI_Transmit instead of HAL_SPI_TransmitReceive — reads returned garbage. Changed to in-place full-duplex. Dead code (never called), fixed per audit recommendation. Test added: test_bug11_platform_spi_transmit_only.c. Mock infrastructure updated with SPI spy types. All 11 firmware tests pass. FPGA B2: Migrated long_chirp_lut[0:3599] from ~700 lines of hardcoded assignments to BRAM with (* ram_style = "block" *) attribute and $readmemh("long_chirp_lut.mem"). Added sync-only read block for proper BRAM inference. 1-cycle read latency introduced. short_chirp_lut left as distributed RAM (60 entries, too small for BRAM). FPGA B3: Added BREG (window_val_reg) and MREG (mult_i_raw/mult_q_raw) pipeline stages to doppler_processor.v. Eliminates DPIP-1 and DPOP-2 DRC warnings. S_LOAD_FFT retimed: fft_input_valid starts at sub=2, +1 cycle total latency. BREG primed in S_PRE_READ at no extra cost. Both FPGA files compile clean with Icarus Verilog.
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@@ -264,6 +264,37 @@ void mock_tim_set_compare(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t Co
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});
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}
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/* ========================= SPI stubs ============================== */
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HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
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{
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spy_push((SpyRecord){
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.type = SPY_SPI_TRANSMIT_RECEIVE,
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.port = NULL,
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.pin = Size,
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.value = Timeout,
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.extra = hspi
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});
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return HAL_OK;
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}
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HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
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{
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spy_push((SpyRecord){
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.type = SPY_SPI_TRANSMIT,
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.port = NULL,
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.pin = Size,
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.value = Timeout,
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.extra = hspi
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});
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return HAL_OK;
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}
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/* Stub for platform_noos_stm32.c GPIO functions */
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void hal_set_gpio_by_index(uint8_t idx, uint8_t value) {
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(void)idx; (void)value;
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}
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/* ========================= Mock stm32_spi_ops ===================== */
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/* Stub SPI platform ops -- real adf4382a_manager.c references &stm32_spi_ops.
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