b4d1869582
- rx_gain_control.v: sign-extension fix ({agc_gain[3],agc_gain} not {1'b0,agc_gain})
+ inclusive frame_boundary snapshot via combinational helpers (Bug #7)
- v7/dashboard.py: Qt thread-safe logging via pyqtSignal bridge (Bug #1)
+ table headers corrected to 'Range (m)' / 'Velocity (m/s)' (Bug #2)
- main.cpp: guard outerAgc.applyGain() with if(outerAgc.enabled) (Bug #3)
- radar_protocol.py: replay L1 threshold detection when CFAR disabled (Bug #4)
+ IndexError guard in replay open (Bug #5) + AGC opcodes in _HARDWARE_ONLY_OPCODES
- radar_dashboard.py: AGC monitor attribute name fixes (3 labels)
- tb_rx_gain_control.v: Tests 17-19 (sign-ext, simultaneous valid+boundary, enable toggle)
- tb_cross_layer_ft2232h.v: AGC opcode vectors 0x28-0x2C in Exercise A (Bug #6)
Vivado 50T build verified: WNS=+0.002ns, WHS=+0.028ns — all timing constraints met.
All tests pass: MCU 21/21, GUI 120/120, cross-layer 29/29, FPGA 25/25 (68 checks).
715 lines
28 KiB
Verilog
715 lines
28 KiB
Verilog
`timescale 1ns / 1ps
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/**
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* tb_cross_layer_ft2232h.v
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*
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* Cross-layer contract testbench for the FT2232H USB interface.
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* Exercises three packet types with known distinctive values and dumps
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* captured bytes to text files that the Python orchestrator can parse.
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*
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* Exercise A: Command round-trip (Host -> FPGA)
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* - Send every opcode through the 4-byte read FSM
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* - Dump cmd_opcode, cmd_addr, cmd_value to cmd_results.txt
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*
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* Exercise B: Data packet generation (FPGA -> Host)
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* - Inject known range/doppler/cfar values
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* - Capture all 11 output bytes
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* - Dump to data_packet.txt
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*
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* Exercise C: Status packet generation (FPGA -> Host)
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* - Set all status inputs to known non-zero values
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* - Trigger status request
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* - Capture all 26 output bytes
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* - Dump to status_packet.txt
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*/
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module tb_cross_layer_ft2232h;
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// Clock periods
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localparam CLK_PERIOD = 10.0; // 100 MHz system clock
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localparam FT_CLK_PERIOD = 16.67; // 60 MHz FT2232H clock
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// ---- Signals ----
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reg clk;
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reg reset_n;
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reg ft_reset_n;
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// Radar data inputs
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reg [31:0] range_profile;
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reg range_valid;
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reg [15:0] doppler_real;
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reg [15:0] doppler_imag;
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reg doppler_valid;
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reg cfar_detection;
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reg cfar_valid;
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// FT2232H physical interface
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wire [7:0] ft_data;
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reg ft_rxf_n;
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reg ft_txe_n;
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wire ft_rd_n;
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wire ft_wr_n;
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wire ft_oe_n;
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wire ft_siwu;
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reg ft_clk;
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// Host-side bus driver (for command injection)
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reg [7:0] host_data_drive;
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reg host_data_drive_en;
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assign ft_data = host_data_drive_en ? host_data_drive : 8'hZZ;
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// Pulldown to avoid X during idle
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pulldown pd[7:0] (ft_data);
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// DUT command outputs
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wire [31:0] cmd_data;
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wire cmd_valid;
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wire [7:0] cmd_opcode;
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wire [7:0] cmd_addr;
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wire [15:0] cmd_value;
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// Stream control
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reg [2:0] stream_control;
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// Status inputs
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reg status_request;
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reg [15:0] status_cfar_threshold;
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reg [2:0] status_stream_ctrl;
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reg [1:0] status_radar_mode;
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reg [15:0] status_long_chirp;
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reg [15:0] status_long_listen;
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reg [15:0] status_guard;
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reg [15:0] status_short_chirp;
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reg [15:0] status_short_listen;
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reg [5:0] status_chirps_per_elev;
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reg [1:0] status_range_mode;
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reg [4:0] status_self_test_flags;
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reg [7:0] status_self_test_detail;
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reg status_self_test_busy;
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reg [3:0] status_agc_current_gain;
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reg [7:0] status_agc_peak_magnitude;
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reg [7:0] status_agc_saturation_count;
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reg status_agc_enable;
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// ---- Clock generators ----
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always #(CLK_PERIOD / 2) clk = ~clk;
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always #(FT_CLK_PERIOD / 2) ft_clk = ~ft_clk;
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// ---- DUT instantiation ----
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usb_data_interface_ft2232h uut (
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.clk (clk),
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.reset_n (reset_n),
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.ft_reset_n (ft_reset_n),
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.range_profile (range_profile),
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.range_valid (range_valid),
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.doppler_real (doppler_real),
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.doppler_imag (doppler_imag),
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.doppler_valid (doppler_valid),
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.cfar_detection (cfar_detection),
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.cfar_valid (cfar_valid),
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.ft_data (ft_data),
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.ft_rxf_n (ft_rxf_n),
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.ft_txe_n (ft_txe_n),
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.ft_rd_n (ft_rd_n),
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.ft_wr_n (ft_wr_n),
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.ft_oe_n (ft_oe_n),
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.ft_siwu (ft_siwu),
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.ft_clk (ft_clk),
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.cmd_data (cmd_data),
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.cmd_valid (cmd_valid),
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.cmd_opcode (cmd_opcode),
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.cmd_addr (cmd_addr),
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.cmd_value (cmd_value),
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.stream_control (stream_control),
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.status_request (status_request),
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.status_cfar_threshold (status_cfar_threshold),
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.status_stream_ctrl (status_stream_ctrl),
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.status_radar_mode (status_radar_mode),
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.status_long_chirp (status_long_chirp),
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.status_long_listen (status_long_listen),
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.status_guard (status_guard),
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.status_short_chirp (status_short_chirp),
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.status_short_listen (status_short_listen),
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.status_chirps_per_elev (status_chirps_per_elev),
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.status_range_mode (status_range_mode),
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.status_self_test_flags (status_self_test_flags),
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.status_self_test_detail(status_self_test_detail),
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.status_self_test_busy (status_self_test_busy),
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.status_agc_current_gain (status_agc_current_gain),
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.status_agc_peak_magnitude (status_agc_peak_magnitude),
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.status_agc_saturation_count(status_agc_saturation_count),
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.status_agc_enable (status_agc_enable)
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);
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// ---- Test bookkeeping ----
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integer pass_count;
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integer fail_count;
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integer test_num;
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integer cmd_file;
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integer data_file;
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integer status_file;
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// ---- Check task ----
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task check;
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input cond;
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input [511:0] label;
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begin
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test_num = test_num + 1;
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if (cond) begin
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$display("[PASS] Test %0d: %0s", test_num, label);
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pass_count = pass_count + 1;
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end else begin
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$display("[FAIL] Test %0d: %0s", test_num, label);
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fail_count = fail_count + 1;
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end
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end
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endtask
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// ---- Helper: apply reset ----
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task apply_reset;
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begin
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reset_n = 0;
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ft_reset_n = 0;
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range_profile = 32'h0;
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range_valid = 0;
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doppler_real = 16'h0;
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doppler_imag = 16'h0;
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doppler_valid = 0;
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cfar_detection = 0;
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cfar_valid = 0;
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ft_rxf_n = 1; // No host data available
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ft_txe_n = 0; // TX FIFO ready
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host_data_drive = 8'h0;
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host_data_drive_en = 0;
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stream_control = 3'b111;
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status_request = 0;
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status_cfar_threshold = 16'd0;
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status_stream_ctrl = 3'b000;
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status_radar_mode = 2'b00;
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status_long_chirp = 16'd0;
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status_long_listen = 16'd0;
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status_guard = 16'd0;
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status_short_chirp = 16'd0;
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status_short_listen = 16'd0;
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status_chirps_per_elev = 6'd0;
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status_range_mode = 2'b00;
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status_self_test_flags = 5'b00000;
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status_self_test_detail = 8'd0;
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status_self_test_busy = 1'b0;
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status_agc_current_gain = 4'd0;
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status_agc_peak_magnitude = 8'd0;
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status_agc_saturation_count = 8'd0;
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status_agc_enable = 1'b0;
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repeat (6) @(posedge ft_clk);
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reset_n = 1;
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ft_reset_n = 1;
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// Wait for stream_control CDC to propagate
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repeat (8) @(posedge ft_clk);
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end
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endtask
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// ---- Helper: send one 4-byte command via FT2232H read path ----
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//
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// FT2232H read FSM cycle-by-cycle:
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// Cycle 0 (RD_IDLE): sees !ft_rxf_n → ft_oe_n<=0, → RD_OE_ASSERT
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// Cycle 1 (RD_OE_ASSERT): sees !ft_rxf_n → ft_rd_n<=0, → RD_READING
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// Cycle 2 (RD_READING): samples ft_data=byte0, cnt 0→1
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// Cycle 3 (RD_READING): samples ft_data=byte1, cnt 1→2
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// Cycle 4 (RD_READING): samples ft_data=byte2, cnt 2→3
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// Cycle 5 (RD_READING): samples ft_data=byte3, cnt=3→0, → RD_DEASSERT
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// Cycle 6 (RD_DEASSERT): ft_oe_n<=1, → RD_PROCESS
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// Cycle 7 (RD_PROCESS): cmd_valid<=1, decode, → RD_IDLE
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//
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// Data must be stable BEFORE the sampling posedge. We use #1 after
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// posedge to change data in the "delta after" region.
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task send_command_ft2232h;
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input [7:0] byte0; // opcode
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input [7:0] byte1; // addr
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input [7:0] byte2; // value_hi
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input [7:0] byte3; // value_lo
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begin
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// Pre-drive byte0 and signal data available
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@(posedge ft_clk); #1;
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host_data_drive = byte0;
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host_data_drive_en = 1;
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ft_rxf_n = 0;
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// Cycle 0: RD_IDLE sees !ft_rxf_n, goes to OE_ASSERT
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@(posedge ft_clk); #1;
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// Cycle 1: RD_OE_ASSERT, ft_rd_n goes low, goes to RD_READING
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@(posedge ft_clk); #1;
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// Cycle 2: RD_READING, byte0 is sampled, cnt 0→1
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// Now change to byte1 for next sample
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@(posedge ft_clk); #1;
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host_data_drive = byte1;
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// Cycle 3: RD_READING, byte1 is sampled, cnt 1→2
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@(posedge ft_clk); #1;
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host_data_drive = byte2;
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// Cycle 4: RD_READING, byte2 is sampled, cnt 2→3
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@(posedge ft_clk); #1;
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host_data_drive = byte3;
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// Cycle 5: RD_READING, byte3 is sampled, cnt=3, → RD_DEASSERT
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@(posedge ft_clk); #1;
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// Cycle 6: RD_DEASSERT, ft_oe_n←1, → RD_PROCESS
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@(posedge ft_clk); #1;
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// Cycle 7: RD_PROCESS, cmd decoded, cmd_valid←1, → RD_IDLE
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@(posedge ft_clk); #1;
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// cmd_valid was asserted at cycle 7's posedge. cmd_opcode/addr/value
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// are now valid (registered outputs hold until next RD_PROCESS).
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// Release bus
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host_data_drive_en = 0;
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host_data_drive = 8'h0;
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ft_rxf_n = 1;
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// Settle
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repeat (2) @(posedge ft_clk);
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end
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endtask
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// ---- Helper: capture N write bytes from the DUT ----
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// Monitors ft_wr_n and ft_data_out, captures bytes into array.
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// Used for data packets (11 bytes) and status packets (26 bytes).
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reg [7:0] captured_bytes [0:31];
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integer capture_count;
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task capture_write_bytes;
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input integer expected_count;
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integer timeout;
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begin
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capture_count = 0;
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timeout = 0;
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while (capture_count < expected_count && timeout < 2000) begin
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@(posedge ft_clk); #1;
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timeout = timeout + 1;
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// DUT drives byte when ft_wr_n=0 and ft_data_oe=1
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// Sample AFTER posedge so registered outputs are settled
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if (!ft_wr_n && uut.ft_data_oe) begin
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captured_bytes[capture_count] = uut.ft_data_out;
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capture_count = capture_count + 1;
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end
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end
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end
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endtask
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// ---- Helper: pulse range_valid with CDC wait ----
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// Toggle CDC needs 3 sync stages + edge detect = 4+ ft_clk cycles.
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// Use 12 for safety margin.
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task assert_range_valid;
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input [31:0] data;
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begin
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@(posedge clk); #1;
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range_profile = data;
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range_valid = 1;
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@(posedge clk); #1;
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range_valid = 0;
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// Wait for toggle CDC propagation
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repeat (12) @(posedge ft_clk);
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end
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endtask
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// ---- Helper: pulse doppler_valid ----
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task pulse_doppler;
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input [15:0] dr;
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input [15:0] di;
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begin
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@(posedge clk); #1;
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doppler_real = dr;
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doppler_imag = di;
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doppler_valid = 1;
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@(posedge clk); #1;
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doppler_valid = 0;
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repeat (12) @(posedge ft_clk);
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end
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endtask
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// ---- Helper: pulse cfar_valid ----
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task pulse_cfar;
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input det;
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begin
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@(posedge clk); #1;
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cfar_detection = det;
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cfar_valid = 1;
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@(posedge clk); #1;
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cfar_valid = 0;
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repeat (12) @(posedge ft_clk);
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end
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endtask
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// ---- Helper: pulse status_request ----
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task pulse_status_request;
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begin
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@(posedge clk); #1;
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status_request = 1;
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@(posedge clk); #1;
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status_request = 0;
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// Wait for toggle CDC propagation
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repeat (12) @(posedge ft_clk);
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end
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endtask
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// ================================================================
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// Main stimulus
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// ================================================================
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integer i;
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initial begin
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$dumpfile("tb_cross_layer_ft2232h.vcd");
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$dumpvars(0, tb_cross_layer_ft2232h);
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clk = 0;
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ft_clk = 0;
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pass_count = 0;
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fail_count = 0;
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test_num = 0;
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// ============================================================
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// EXERCISE A: Command Round-Trip
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// Send commands with known opcode/addr/value, verify decoding.
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// Dump results to cmd_results.txt for Python validation.
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// ============================================================
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$display("\n=== EXERCISE A: Command Round-Trip ===");
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apply_reset;
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cmd_file = $fopen("cmd_results.txt", "w");
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$fwrite(cmd_file, "# opcode_sent addr_sent value_sent opcode_got addr_got value_got\n");
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// Test all real opcodes from radar_system_top.v
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// Format: opcode, addr=0x00, value
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// Basic control
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send_command_ft2232h(8'h01, 8'h00, 8'h00, 8'h02); // RADAR_MODE=2
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$fwrite(cmd_file, "%02x %02x %04x %02x %02x %04x\n",
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8'h01, 8'h00, 16'h0002, cmd_opcode, cmd_addr, cmd_value);
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check(cmd_opcode === 8'h01 && cmd_value === 16'h0002,
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"Cmd 0x01: RADAR_MODE=2");
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send_command_ft2232h(8'h02, 8'h00, 8'h00, 8'h01); // TRIGGER_PULSE
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$fwrite(cmd_file, "%02x %02x %04x %02x %02x %04x\n",
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8'h02, 8'h00, 16'h0001, cmd_opcode, cmd_addr, cmd_value);
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check(cmd_opcode === 8'h02 && cmd_value === 16'h0001,
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"Cmd 0x02: TRIGGER_PULSE");
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send_command_ft2232h(8'h03, 8'h00, 8'h27, 8'h10); // DETECT_THRESHOLD=10000
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$fwrite(cmd_file, "%02x %02x %04x %02x %02x %04x\n",
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8'h03, 8'h00, 16'h2710, cmd_opcode, cmd_addr, cmd_value);
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check(cmd_opcode === 8'h03 && cmd_value === 16'h2710,
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"Cmd 0x03: DETECT_THRESHOLD=10000");
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send_command_ft2232h(8'h04, 8'h00, 8'h00, 8'h07); // STREAM_CONTROL=7
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$fwrite(cmd_file, "%02x %02x %04x %02x %02x %04x\n",
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8'h04, 8'h00, 16'h0007, cmd_opcode, cmd_addr, cmd_value);
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check(cmd_opcode === 8'h04 && cmd_value === 16'h0007,
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"Cmd 0x04: STREAM_CONTROL=7");
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// Chirp timing
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send_command_ft2232h(8'h10, 8'h00, 8'h0B, 8'hB8); // LONG_CHIRP=3000
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$fwrite(cmd_file, "%02x %02x %04x %02x %02x %04x\n",
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8'h10, 8'h00, 16'h0BB8, cmd_opcode, cmd_addr, cmd_value);
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check(cmd_opcode === 8'h10 && cmd_value === 16'h0BB8,
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"Cmd 0x10: LONG_CHIRP=3000");
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send_command_ft2232h(8'h11, 8'h00, 8'h35, 8'h84); // LONG_LISTEN=13700
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$fwrite(cmd_file, "%02x %02x %04x %02x %02x %04x\n",
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8'h11, 8'h00, 16'h3584, cmd_opcode, cmd_addr, cmd_value);
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check(cmd_opcode === 8'h11 && cmd_value === 16'h3584,
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"Cmd 0x11: LONG_LISTEN=13700");
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send_command_ft2232h(8'h12, 8'h00, 8'h44, 8'h84); // GUARD=17540
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$fwrite(cmd_file, "%02x %02x %04x %02x %02x %04x\n",
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8'h12, 8'h00, 16'h4484, cmd_opcode, cmd_addr, cmd_value);
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check(cmd_opcode === 8'h12 && cmd_value === 16'h4484,
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"Cmd 0x12: GUARD=17540");
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send_command_ft2232h(8'h13, 8'h00, 8'h00, 8'h32); // SHORT_CHIRP=50
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$fwrite(cmd_file, "%02x %02x %04x %02x %02x %04x\n",
|
|
8'h13, 8'h00, 16'h0032, cmd_opcode, cmd_addr, cmd_value);
|
|
check(cmd_opcode === 8'h13 && cmd_value === 16'h0032,
|
|
"Cmd 0x13: SHORT_CHIRP=50");
|
|
|
|
send_command_ft2232h(8'h14, 8'h00, 8'h44, 8'h2A); // SHORT_LISTEN=17450
|
|
$fwrite(cmd_file, "%02x %02x %04x %02x %02x %04x\n",
|
|
8'h14, 8'h00, 16'h442A, cmd_opcode, cmd_addr, cmd_value);
|
|
check(cmd_opcode === 8'h14 && cmd_value === 16'h442A,
|
|
"Cmd 0x14: SHORT_LISTEN=17450");
|
|
|
|
send_command_ft2232h(8'h15, 8'h00, 8'h00, 8'h20); // CHIRPS_PER_ELEV=32
|
|
$fwrite(cmd_file, "%02x %02x %04x %02x %02x %04x\n",
|
|
8'h15, 8'h00, 16'h0020, cmd_opcode, cmd_addr, cmd_value);
|
|
check(cmd_opcode === 8'h15 && cmd_value === 16'h0020,
|
|
"Cmd 0x15: CHIRPS_PER_ELEV=32");
|
|
|
|
// Digital gain
|
|
send_command_ft2232h(8'h16, 8'h00, 8'h00, 8'h05); // GAIN_SHIFT=5
|
|
$fwrite(cmd_file, "%02x %02x %04x %02x %02x %04x\n",
|
|
8'h16, 8'h00, 16'h0005, cmd_opcode, cmd_addr, cmd_value);
|
|
check(cmd_opcode === 8'h16 && cmd_value === 16'h0005,
|
|
"Cmd 0x16: GAIN_SHIFT=5");
|
|
|
|
// Signal processing
|
|
send_command_ft2232h(8'h20, 8'h00, 8'h00, 8'h01); // RANGE_MODE=1
|
|
$fwrite(cmd_file, "%02x %02x %04x %02x %02x %04x\n",
|
|
8'h20, 8'h00, 16'h0001, cmd_opcode, cmd_addr, cmd_value);
|
|
check(cmd_opcode === 8'h20 && cmd_value === 16'h0001,
|
|
"Cmd 0x20: RANGE_MODE=1");
|
|
|
|
send_command_ft2232h(8'h21, 8'h00, 8'h00, 8'h03); // CFAR_GUARD=3
|
|
$fwrite(cmd_file, "%02x %02x %04x %02x %02x %04x\n",
|
|
8'h21, 8'h00, 16'h0003, cmd_opcode, cmd_addr, cmd_value);
|
|
check(cmd_opcode === 8'h21 && cmd_value === 16'h0003,
|
|
"Cmd 0x21: CFAR_GUARD=3");
|
|
|
|
send_command_ft2232h(8'h22, 8'h00, 8'h00, 8'h0C); // CFAR_TRAIN=12
|
|
$fwrite(cmd_file, "%02x %02x %04x %02x %02x %04x\n",
|
|
8'h22, 8'h00, 16'h000C, cmd_opcode, cmd_addr, cmd_value);
|
|
check(cmd_opcode === 8'h22 && cmd_value === 16'h000C,
|
|
"Cmd 0x22: CFAR_TRAIN=12");
|
|
|
|
send_command_ft2232h(8'h23, 8'h00, 8'h00, 8'h30); // CFAR_ALPHA=0x30
|
|
$fwrite(cmd_file, "%02x %02x %04x %02x %02x %04x\n",
|
|
8'h23, 8'h00, 16'h0030, cmd_opcode, cmd_addr, cmd_value);
|
|
check(cmd_opcode === 8'h23 && cmd_value === 16'h0030,
|
|
"Cmd 0x23: CFAR_ALPHA=0x30");
|
|
|
|
send_command_ft2232h(8'h24, 8'h00, 8'h00, 8'h01); // CFAR_MODE=1 (GO)
|
|
$fwrite(cmd_file, "%02x %02x %04x %02x %02x %04x\n",
|
|
8'h24, 8'h00, 16'h0001, cmd_opcode, cmd_addr, cmd_value);
|
|
check(cmd_opcode === 8'h24 && cmd_value === 16'h0001,
|
|
"Cmd 0x24: CFAR_MODE=1");
|
|
|
|
send_command_ft2232h(8'h25, 8'h00, 8'h00, 8'h01); // CFAR_ENABLE=1
|
|
$fwrite(cmd_file, "%02x %02x %04x %02x %02x %04x\n",
|
|
8'h25, 8'h00, 16'h0001, cmd_opcode, cmd_addr, cmd_value);
|
|
check(cmd_opcode === 8'h25 && cmd_value === 16'h0001,
|
|
"Cmd 0x25: CFAR_ENABLE=1");
|
|
|
|
send_command_ft2232h(8'h26, 8'h00, 8'h00, 8'h01); // MTI_ENABLE=1
|
|
$fwrite(cmd_file, "%02x %02x %04x %02x %02x %04x\n",
|
|
8'h26, 8'h00, 16'h0001, cmd_opcode, cmd_addr, cmd_value);
|
|
check(cmd_opcode === 8'h26 && cmd_value === 16'h0001,
|
|
"Cmd 0x26: MTI_ENABLE=1");
|
|
|
|
send_command_ft2232h(8'h27, 8'h00, 8'h00, 8'h03); // DC_NOTCH_WIDTH=3
|
|
$fwrite(cmd_file, "%02x %02x %04x %02x %02x %04x\n",
|
|
8'h27, 8'h00, 16'h0003, cmd_opcode, cmd_addr, cmd_value);
|
|
check(cmd_opcode === 8'h27 && cmd_value === 16'h0003,
|
|
"Cmd 0x27: DC_NOTCH_WIDTH=3");
|
|
|
|
// AGC registers (0x28-0x2C)
|
|
send_command_ft2232h(8'h28, 8'h00, 8'h00, 8'h01); // AGC_ENABLE=1
|
|
$fwrite(cmd_file, "%02x %02x %04x %02x %02x %04x\n",
|
|
8'h28, 8'h00, 16'h0001, cmd_opcode, cmd_addr, cmd_value);
|
|
check(cmd_opcode === 8'h28 && cmd_value === 16'h0001,
|
|
"Cmd 0x28: AGC_ENABLE=1");
|
|
|
|
send_command_ft2232h(8'h29, 8'h00, 8'h00, 8'hC8); // AGC_TARGET=200
|
|
$fwrite(cmd_file, "%02x %02x %04x %02x %02x %04x\n",
|
|
8'h29, 8'h00, 16'h00C8, cmd_opcode, cmd_addr, cmd_value);
|
|
check(cmd_opcode === 8'h29 && cmd_value === 16'h00C8,
|
|
"Cmd 0x29: AGC_TARGET=200");
|
|
|
|
send_command_ft2232h(8'h2A, 8'h00, 8'h00, 8'h02); // AGC_ATTACK=2
|
|
$fwrite(cmd_file, "%02x %02x %04x %02x %02x %04x\n",
|
|
8'h2A, 8'h00, 16'h0002, cmd_opcode, cmd_addr, cmd_value);
|
|
check(cmd_opcode === 8'h2A && cmd_value === 16'h0002,
|
|
"Cmd 0x2A: AGC_ATTACK=2");
|
|
|
|
send_command_ft2232h(8'h2B, 8'h00, 8'h00, 8'h03); // AGC_DECAY=3
|
|
$fwrite(cmd_file, "%02x %02x %04x %02x %02x %04x\n",
|
|
8'h2B, 8'h00, 16'h0003, cmd_opcode, cmd_addr, cmd_value);
|
|
check(cmd_opcode === 8'h2B && cmd_value === 16'h0003,
|
|
"Cmd 0x2B: AGC_DECAY=3");
|
|
|
|
send_command_ft2232h(8'h2C, 8'h00, 8'h00, 8'h06); // AGC_HOLDOFF=6
|
|
$fwrite(cmd_file, "%02x %02x %04x %02x %02x %04x\n",
|
|
8'h2C, 8'h00, 16'h0006, cmd_opcode, cmd_addr, cmd_value);
|
|
check(cmd_opcode === 8'h2C && cmd_value === 16'h0006,
|
|
"Cmd 0x2C: AGC_HOLDOFF=6");
|
|
|
|
// Self-test / status
|
|
send_command_ft2232h(8'h30, 8'h00, 8'h00, 8'h01); // SELF_TEST_TRIGGER
|
|
$fwrite(cmd_file, "%02x %02x %04x %02x %02x %04x\n",
|
|
8'h30, 8'h00, 16'h0001, cmd_opcode, cmd_addr, cmd_value);
|
|
check(cmd_opcode === 8'h30 && cmd_value === 16'h0001,
|
|
"Cmd 0x30: SELF_TEST_TRIGGER");
|
|
|
|
send_command_ft2232h(8'h31, 8'h00, 8'h00, 8'h01); // SELF_TEST_STATUS
|
|
$fwrite(cmd_file, "%02x %02x %04x %02x %02x %04x\n",
|
|
8'h31, 8'h00, 16'h0001, cmd_opcode, cmd_addr, cmd_value);
|
|
check(cmd_opcode === 8'h31 && cmd_value === 16'h0001,
|
|
"Cmd 0x31: SELF_TEST_STATUS");
|
|
|
|
send_command_ft2232h(8'hFF, 8'h00, 8'h00, 8'h00); // STATUS_REQUEST
|
|
$fwrite(cmd_file, "%02x %02x %04x %02x %02x %04x\n",
|
|
8'hFF, 8'h00, 16'h0000, cmd_opcode, cmd_addr, cmd_value);
|
|
check(cmd_opcode === 8'hFF && cmd_value === 16'h0000,
|
|
"Cmd 0xFF: STATUS_REQUEST");
|
|
|
|
// Non-zero addr test
|
|
send_command_ft2232h(8'h01, 8'hAB, 8'hCD, 8'hEF); // addr=0xAB, value=0xCDEF
|
|
$fwrite(cmd_file, "%02x %02x %04x %02x %02x %04x\n",
|
|
8'h01, 8'hAB, 16'hCDEF, cmd_opcode, cmd_addr, cmd_value);
|
|
check(cmd_opcode === 8'h01 && cmd_addr === 8'hAB && cmd_value === 16'hCDEF,
|
|
"Cmd 0x01 with addr=0xAB, value=0xCDEF");
|
|
|
|
$fclose(cmd_file);
|
|
|
|
// ============================================================
|
|
// EXERCISE B: Data Packet Generation
|
|
// Inject known values, capture 11-byte output.
|
|
// ============================================================
|
|
$display("\n=== EXERCISE B: Data Packet Generation ===");
|
|
apply_reset;
|
|
ft_txe_n = 0; // TX FIFO ready
|
|
|
|
// Use distinctive values that make truncation/swap bugs obvious
|
|
// range_profile = {Q[15:0], I[15:0]} = {0xCAFE, 0xBEEF}
|
|
// doppler_real = 0x1234, doppler_imag = 0x5678
|
|
// cfar_detection = 1
|
|
|
|
// First inject doppler and cfar so pending flags are set
|
|
pulse_doppler(16'h1234, 16'h5678);
|
|
pulse_cfar(1'b1);
|
|
|
|
// Now inject range_valid which triggers the write FSM.
|
|
// CRITICAL: Must capture bytes IN PARALLEL with the trigger,
|
|
// because the write FSM starts sending bytes ~3-4 ft_clk cycles
|
|
// after the toggle CDC propagates. If we wait for CDC propagation
|
|
// first, capture_write_bytes misses the early bytes.
|
|
fork
|
|
assert_range_valid(32'hCAFE_BEEF);
|
|
capture_write_bytes(11);
|
|
join
|
|
|
|
check(capture_count === 11,
|
|
"Data packet: captured 11 bytes");
|
|
|
|
// Dump captured bytes to file
|
|
data_file = $fopen("data_packet.txt", "w");
|
|
$fwrite(data_file, "# byte_index hex_value\n");
|
|
for (i = 0; i < capture_count; i = i + 1) begin
|
|
$fwrite(data_file, "%0d %02x\n", i, captured_bytes[i]);
|
|
end
|
|
$fclose(data_file);
|
|
|
|
// Verify locally too
|
|
check(captured_bytes[0] === 8'hAA,
|
|
"Data pkt: byte 0 = 0xAA (header)");
|
|
check(captured_bytes[1] === 8'hCA,
|
|
"Data pkt: byte 1 = 0xCA (range MSB = Q high)");
|
|
check(captured_bytes[2] === 8'hFE,
|
|
"Data pkt: byte 2 = 0xFE (range Q low)");
|
|
check(captured_bytes[3] === 8'hBE,
|
|
"Data pkt: byte 3 = 0xBE (range I high)");
|
|
check(captured_bytes[4] === 8'hEF,
|
|
"Data pkt: byte 4 = 0xEF (range I low)");
|
|
check(captured_bytes[5] === 8'h12,
|
|
"Data pkt: byte 5 = 0x12 (doppler_real MSB)");
|
|
check(captured_bytes[6] === 8'h34,
|
|
"Data pkt: byte 6 = 0x34 (doppler_real LSB)");
|
|
check(captured_bytes[7] === 8'h56,
|
|
"Data pkt: byte 7 = 0x56 (doppler_imag MSB)");
|
|
check(captured_bytes[8] === 8'h78,
|
|
"Data pkt: byte 8 = 0x78 (doppler_imag LSB)");
|
|
check(captured_bytes[9] === 8'h01,
|
|
"Data pkt: byte 9 = 0x01 (cfar_detection=1)");
|
|
check(captured_bytes[10] === 8'h55,
|
|
"Data pkt: byte 10 = 0x55 (footer)");
|
|
|
|
// ============================================================
|
|
// EXERCISE C: Status Packet Generation
|
|
// Set known status values, trigger readback, capture 26 bytes.
|
|
// Uses distinctive non-zero values to detect truncation/swap.
|
|
// ============================================================
|
|
$display("\n=== EXERCISE C: Status Packet Generation ===");
|
|
apply_reset;
|
|
ft_txe_n = 0;
|
|
|
|
// Set known distinctive status values
|
|
status_cfar_threshold = 16'hABCD;
|
|
status_stream_ctrl = 3'b101;
|
|
status_radar_mode = 2'b11; // Use 0b11 to test both bits
|
|
status_long_chirp = 16'h1234;
|
|
status_long_listen = 16'h5678;
|
|
status_guard = 16'h9ABC;
|
|
status_short_chirp = 16'hDEF0;
|
|
status_short_listen = 16'hFACE;
|
|
status_chirps_per_elev = 6'd42;
|
|
status_range_mode = 2'b10;
|
|
status_self_test_flags = 5'b10101;
|
|
status_self_test_detail = 8'hA5;
|
|
status_self_test_busy = 1'b1;
|
|
status_agc_current_gain = 4'd7;
|
|
status_agc_peak_magnitude = 8'd200;
|
|
status_agc_saturation_count = 8'd15;
|
|
status_agc_enable = 1'b1;
|
|
|
|
// Pulse status_request and capture bytes IN PARALLEL
|
|
// (same reason as Exercise B — write FSM starts before CDC wait ends)
|
|
fork
|
|
pulse_status_request;
|
|
capture_write_bytes(26);
|
|
join
|
|
|
|
check(capture_count === 26,
|
|
"Status packet: captured 26 bytes");
|
|
|
|
// Dump captured bytes to file
|
|
status_file = $fopen("status_packet.txt", "w");
|
|
$fwrite(status_file, "# byte_index hex_value\n");
|
|
for (i = 0; i < capture_count; i = i + 1) begin
|
|
$fwrite(status_file, "%0d %02x\n", i, captured_bytes[i]);
|
|
end
|
|
|
|
// Also dump the raw status_words for debugging
|
|
$fwrite(status_file, "# status_words (internal):\n");
|
|
for (i = 0; i < 6; i = i + 1) begin
|
|
$fwrite(status_file, "# word[%0d] = %08x\n", i, uut.status_words[i]);
|
|
end
|
|
$fclose(status_file);
|
|
|
|
// Verify header/footer locally
|
|
check(captured_bytes[0] === 8'hBB,
|
|
"Status pkt: byte 0 = 0xBB (status header)");
|
|
check(captured_bytes[25] === 8'h55,
|
|
"Status pkt: byte 25 = 0x55 (footer)");
|
|
|
|
// Verify status_words[1] = {long_chirp, long_listen} = {0x1234, 0x5678}
|
|
check(captured_bytes[5] === 8'h12 && captured_bytes[6] === 8'h34 &&
|
|
captured_bytes[7] === 8'h56 && captured_bytes[8] === 8'h78,
|
|
"Status pkt: word1 = {long_chirp=0x1234, long_listen=0x5678}");
|
|
|
|
// Verify status_words[2] = {guard, short_chirp} = {0x9ABC, 0xDEF0}
|
|
check(captured_bytes[9] === 8'h9A && captured_bytes[10] === 8'hBC &&
|
|
captured_bytes[11] === 8'hDE && captured_bytes[12] === 8'hF0,
|
|
"Status pkt: word2 = {guard=0x9ABC, short_chirp=0xDEF0}");
|
|
|
|
// ============================================================
|
|
// Summary
|
|
// ============================================================
|
|
$display("");
|
|
$display("========================================");
|
|
$display(" CROSS-LAYER FT2232H TB RESULTS");
|
|
$display(" PASSED: %0d / %0d", pass_count, test_num);
|
|
$display(" FAILED: %0d / %0d", fail_count, test_num);
|
|
if (fail_count == 0)
|
|
$display(" ** ALL TESTS PASSED **");
|
|
else
|
|
$display(" ** SOME TESTS FAILED **");
|
|
$display("========================================");
|
|
|
|
#100;
|
|
$finish;
|
|
end
|
|
|
|
endmodule
|