Commit Graph
2 Commits
Author SHA1 Message Date
Serhii 48b3847256 fix(scripts): make Vivado TCL scripts portable and update RTL file lists
- Replace hardcoded /home/jason-stone/ paths with [info script]-relative
  path resolution in all 9 scripts (build17-21, insert_ila_probes,
  program_fpga, ila_capture, run_cdc_and_netlist)
- Point constraint references at tracked XDC files instead of
  untracked synth_only.xdc
- Remove six phantom RTL entries (chirp_lut_init.v, fft_1024_forward.v,
  fft_1024_inverse.v, level_shifter_interface.v, lvds_to_cmos_400m.v,
  usb_packet_analyzer.v)
- Add six existing modules to file lists (rx_gain_control.v,
  mti_canceller.v, cfar_ca.v, fpga_self_test.v, xfft_16.v,
  adc_clk_mmcm.v)

Closes #38
2026-04-06 22:53:42 +03:00
Serhii 7eb81668e0 docs: fix FPGA part number, dead paths, and add CONTRIBUTING.md
- README: XC7A100T → XC7A50T to match the XDC correction note
  (constraints/xc7a50t_ftg256.xdc lines 9-11)
- README: replace dead /10_docs/ paths with tracked locations
- README: update contributing section to reference CONTRIBUTING.md
- Add minimal CONTRIBUTING.md with repo layout and PR checklist

Closes #37
2026-04-06 20:06:56 +03:00